1. Field of the Invention
The present invention relates to a semiconductor package that includes a semiconductor device and a substrate supporting the semiconductor device, and to a method for manufacturing the same.
2. Description of Related Art
Conventionally, a wiring pattern of a foil such as copper is formed on a front surface of a substrate in a semiconductor package. A semiconductor device is then positioned and installed in a predetermined position on top of the substrate and terminals on the semiconductor device are directly connected or indirectly connected via bond wires to the wiring pattern on the substrate. In most cases, in this type of semiconductor package, the semiconductor device portion is sealed by a black resin (see, e.g., Related Art 1). However, there are also semiconductor packages in which the semiconductor device portion is sealed by a transparent resin, such as a semiconductor package that includes an optical semiconductor device such as a light receiving element having a photodiode array for detecting optical displacement, for example. In a semiconductor package of this kind that includes the optical semiconductor device, a position of the semiconductor device on the substrate affects a degree of accuracy for displacement detection. Therefore, highly accurate positioning of the semiconductor device on the substrate is required.
A method for positioning and installing the semiconductor device on the substrate with a high degree of accuracy is known in which the semiconductor device is installed on the front surface of the substrate while correcting misalignment in positions and orientations of the substrate and the semiconductor device by detecting the position and orientation of each by capturing images of each with a camera (see, e.g., Related Art 2). However, in order to detect and correct misalignment in the position and orientation of the substrate and the semiconductor device by capturing images of each with the camera, an instrument such as a component placement system is necessary. Meanwhile, in a case where a comparatively low number of semiconductor packages are manufactured, as with the semiconductor package that includes the optical semiconductor device, for example, introduction of an instrument such as the component placement system is difficult from a cost perspective. In addition, when the semiconductor device is split off from a semiconductor wafer, irregularly shaped breakages called chipping may be formed on an outer periphery (see, e.g., Related Art 3). When chipping has formed on the outer periphery of the semiconductor device, detecting the position and orientation of the semiconductor device based on the shape of the outer periphery of the semiconductor device may lead to a reduction of accuracy in the detection of the position and orientation of the semiconductor device.
In addition, a method is known in which a capture mark is formed on the substrate and the semiconductor device and the position and orientation of each is detected (see, e.g., Related Art 4). However, depending on a type of the semiconductor device, forming the capture mark may be difficult. For example, when the semiconductor device is the light receiving element having the photodiode array, the region where the photodiode array is to be provided may overlap with the region where the capture mark is to be formed. Moreover, forming the capture mark in a region other than the region where the capture mark is typically formed in order to not overlap with the region where the photodiode array is to be provided may lead to a reduction of accuracy in the detection of the position and orientation of the semiconductor device.
In contrast, a method is known in which a positioning hole or notch is formed in the semiconductor device and substrate, then the semiconductor device is positioned on the substrate by engaging a positioning jig to the positioning hole or notch (see, e.g., Related Arts 5 and 6). In addition, a method is known in which the semiconductor device is positioned on the substrate by mounting a positioning nub to the substrate and abutting the semiconductor device on this nub (see, e.g., Related Art 7).    Related Art 1: Japanese Patent No. 3292723    Related Art 2: Japanese Publication No. S62-57098    Related Art 3: Japanese Patent Laid-open Publication No. 2002-333309    Related Art 4: Japanese Patent Laid-open Publication No. H2-12847    Related Art 5: Japanese Patent Laid-open Publication No. H9-236454    Related Art 6: Japanese Patent Laid-open Publication No. 2003-42811    Related Art 7: Japanese Patent Laid-open Publication No. H9-189515
However, in the case of the method in which the positioning hole or notch is formed on the semiconductor device and substrate to engage with the positioning jig, in order to increase accuracy in positioning of the semiconductor device, the hole or notch must be formed with a high degree of accuracy. In order to form such a highly accurate hole or notch, production time increases and costs increase. In addition, in the case of the method in which the positioning nub is mounted to the substrate, in order to increase accuracy in positioning of the semiconductor device, the positioning nub must be mounted to the substrate with a high degree of accuracy. In order to mount the positioning nub to the substrate with a high degree of accuracy, production time increases and costs increase.